One common goal in capacitor fabrication is to maximize the capacitance for a given size capacitor. It is desirable that stored charge be at a maximum immediately at the physical interface between the respective electrodes or capacitor plates and the capacitor dielectric material between the plates. Typical integrated circuitry capacitors have electrodes or plates which are formed from doped semiconductive material such as polysilicon. The polysilicon is usually heavily doped to impart a desired degree of conductivity for satisfactory capacitor plate operation.
One drawback of heavily doping polysilicon is that during operation a charge depletion region develops at the interface where charge maximization is desired. Hence, a desired level of charge storage is achieved at a location which is displaced from the interface between the capacitor plate and the dielectric material.
Another drawback of heavily doping the polysilicon capacitor plates is that during processing, some of the dopant can migrate away from the polysilicon and into other substrate structures. Dopant migration can adversely affect the performance of such structures. For example, one type of integrated circuitry which utilizes capacitors are memory cells, and more particularly dynamic random access memory (DRAM) devices. Migratory dopants from doped polysilicon capacitor plates can adversely impact adjacent access transistors as by undesirably adjusting the threshold voltages.
As the memory cell density of DRAMs increases there is a continuous challenge to maintain sufficiently high storage capacitance despite decreasing cell area. Additionally there is a continuing goal to further decrease cell area. The principal way of increasing cell capacitance heretofore has been through cell structure techniques. Such techniques include three dimensional cell capacitors such as trench or stacked capacitors.
This invention arose out of concerns associated with improving integrated circuitry capacitors. This invention also grew out of concerns associated with maintaining and improving the capacitance and charge storage capabilities of capacitors utilized in memory cells comprising DRAM devices.